1. Field of the Invention
The present invention relates to an image data processing system and more particularly to a circuit which extends display data to color codes when writing the display data into a display memory.
2. Description of the Prior Art
Recently, an image memory has been increased in capacity, thereby permitting a multicolor display. That is, in such bulk capacity image memory there is employed a bit map system in which a plurality of bits of display data are made to correspond to one display dot.
Specifically, when displaying a character on a screen, at first, the display pattern of the character is given in terms of a font pattern of "1" or "0" (that is, a binary font pattern). Then, each of the above-mentioned "1" and "0" must be extended to a foreground or background color code and the extended color code must be written into a display memory.
In FIG. 14, there is shown a block diagram of a conventional image data processing system.
In this figure, Timing Controller 1 is used to control the general timing of the image data processing system.
Display Controller 30 creates a display signal to display the screen of a CRT or the like in accordance with the timing provided by Timing Controller 21. That is, Display Controller 30 outputs a display address corresponding to a display position of the screen to Address Bus 51 for a display memory so as to access Display Memory 40. The then memory timing is also provided by Timing Controller 21.
The output data from Display Memory 40 is transmitted via Data Bus 53 for display memory to Parallel-Serial Conversion Circuit 32 in Display Controller 30. Then, the display signal is created by means of a predetermined processing by Display Controller 30.
On the other hand, CPU (microprocessor) 60 executes an image processing program from Image Processing Program Memory 61, prepares addresses and data to be written into Display Memory 40 in accordance with data from Input/Output (I/O) Interface 70, and gives an image memory access request to Timing Controller 21. Here, for I/O Interface 70, RS232C, a modem interface, a disk interface, a mouse interface or the like may be used.
When Timing Controller 21 receives the access request from CPU 60, then it enables both Address Buffer 52 for display memory and Data Bus Buffer 54 for display memory in accordance with a timing not in contention with the display access of Display Controller 30. Concurrently with this, an execution permission is granted to CPU 60. In this way, CPU 60 is able to access only the timing permitted to Display Memory 40.
While running the above-mentioned operation repetitively, CPU 60 writes images (display patterns) into Display Memory 40.
Now, let us consider a case in which a pattern to be displayed is character information.
FIG. 15 is an explanatory view for color code extension, in which examples of character patterns to be converted to color codes as well as examples of color codes obtained when the character patterns are partially extended are illustrated.
Similarly to the case of characer codes, character fonts are given in terms of binary fonts (data of 1 or 0). Display Memory 40 is assumed to be a memory which employs a bit map system holding, for example, 16-color 4-bit information for each dot. Also, it is assumed that a foreground (color of a display character) color code is "1010" and a background (color of the background of a display character) color code is "0100".
CPU 60, while checking the above-mentioned character font data bit by bit, arranges the foreground or background color codes correspondingly to "1" or "0" of the bit, as shown in FIG. 15, and transmits the arranged color codes to Display Memory 40 as write data.
Up to now, most conventional character display is achieved using a character generator system, but not by using the above-mentioned bit map system. In the case of the character generator system, if character codes and attribute color codes are written into a display memory, then the extension from the character codes to character fonts as well as the extension from the character fonts to display color codes are executed by hardware previously existing. Therefore, in the character generator system, the extension to the color codes can be processed at a very high speed.
On the contrary, in the bit map system in which a CPU is used to extend the character codes to the color codes with processing time required, the extension to the color codes requires a very long time.
In other words, while CPU 60 is inherently capable of processing a byte or 2 bytes (word) very simply and speedily, it requires a very long time, though not impossible, for CPU 60 to extend data bit by bit while checking it, that is, to rearrange 1 byte of data while expanding the data to a bit string correspondingly to the patterns thereof.
Although it is clear that an image display system capable of a graphic display in the bit map system is of higher grade then a text display system, it is disadvantageous in that it requires a long time for its display processings. Especially when the same pattern data is repetitively extended to color codes, the need to reduce the extension time has been strongly urged in the market.